VLSI Engineer — Hardware Security & Embedded Systems
I build hardware that authenticates itself. My work turns the physical noise of silicon — unstable SRAM bits at power-up — into unclonable cryptographic keys, alongside Verilog accelerators and CNN-based perception systems.
UID 0x4D 45 48 55 4C — derived from name, ASCII-encoded, for illustration.
Designed and shipped an SRAM Physical Unclonable Function (PUF) authentication system — intrinsic power-up states become device-specific keys, with no stored secrets.
Comfortable across the stack: Verilog/SystemVerilog accelerators, embedded ARM, and applied cryptography (ChaCha20, ECDH), down through CNN-based perception models.
Currently pursuing an M.Tech in VLSI Design at Thapar Institute of Engineering & Technology, with published research in autonomous-vehicle perception (IEEE, GTSRB traffic sign classification).
Optimizes for the numbers that matter in hardware: power, area, and timing — not just functional correctness.
Experience
Work History
02
07/2023 – 02/2024
SDE Intern
Watchguard Technologies Ltd
Engineered and shipped features for web applications using C#, Angular, and .NET.
Debugged and resolved issues across the codebase, improving overall system performance.
Ran testing and QA procedures to ensure functionality and reliability.
Collaborated cross-team to deliver required results.
Modules
Projects
03
M0108/2025 – 12/2025
SRAM PUF File Authentication System
Designed and implemented an SRAM Physical Unclonable Function using Arduino to generate hardware-unique keys.
Used intrinsic SRAM power-up states to create device-specific fingerprints for authentication.
Integrated the PUF response as a password mechanism for zip file encryption — eliminating stored or remembered keys.
M0202/2026 – 04/2026
Verilog Image Accelerator
Designed a Verilog-based approximate image accelerator.
Implemented a custom MAC unit for Canny edge detection.
Reduced power draw by ~15% and area by ~20%.
M0302/2026 – 04/2026
CAN Bus Encryption using ChaCha20
Designed a Verilog implementation of the ChaCha20 encryption algorithm.
Verified cipher/plaintext round-trip in Vivado.
Simulated CAN bus traffic across mock controllers with message authentication codes.
M0407/2023 – 07/2024
CNN-Based Traffic Sign Recognition
Authored published research on real-time traffic sign classification for autonomous-vehicle safety.
Built a deep learning model in Python/TensorFlow, served via API to a web interface.
Achieved strong classification accuracy on GTSRB through hyperparameter tuning and pipeline optimization.